This invention relates, in general, to a semiconductor component and, more particularly, to an apparatus and method for analyzing the semiconductor component.
The manufacture of semiconductor components involves many complex, expensive, and time consuming process steps. Typically, semiconductor devices are formed in a semiconductor substrate in wafer form using a series of processing steps that build the semiconductor devices in a vertical direction to conserve silicon real estate. This allows the formation of more semiconductor components from a single semiconductor wafer, thereby decreasing the cost to manufacture them. A semiconductor wafer is laterally partitioned into a plurality semiconductor die. Each semiconductor die is partitioned into a plurality of active device regions using isolation techniques such as trench formation or a local oxidation of silicon (LOCOS). Semiconductor devices are then manufactured in each of the active device regions using masking layers, photolithography, wet and dry etches, and doping techniques known to those skilled in the art. The semiconductor devices are electrically coupled to each other using a plurality of metal layers vertically separated from each other by a dielectric material. The wafers are sawed or diced into individual semiconductor components that are then packaged in plastic or ceramic packages.
An important step in the manufacturing process is testing the completed semiconductor components to ensure they operate properly. Likewise, it is important to test any semiconductor components that were originally operational, but failed during use. This latter type of testing, commonly referred to as failure analysis, is particularly difficult to perform because of the testing sensitivity required. A variety of techniques may be used to perform failure analysis including electron beam induced current (EBIC), biased resistive contrast imaging (BRCI), charge-induced voltage alteration (CIVA), and biased optical beam induced current (biased OBIC). Two techniques that have gained widespread acceptance in analyzing defective semiconductor components are light induced voltage alteration (LIVA) and thermally induced voltage alteration (TIVA). In the LIVA technique, a voltage change of a constant current power supply is monitored as the surface of the semiconductor component is scanned using a light beam. In the TIVA technique, a voltage change of a constant current power supply is monitored as the surface of the semiconductor component is scanned using a focused laser beam that produces localized heating of metal layers of the semiconductor component.
In the past, when using either the LIVA or TIVA technique to analyze a semiconductor component such as, for example, a microprocessor, the microprocessor was placed in a test fixture that did not have a load capacitance coupled to any of the microprocessor power supply pins. A power supply having an internal capacitance was coupled to the test fixture to bias the microprocessor with a high power constant current power supply bias signal. After the microprocessor had been biased, it was initialized with a predetermined signal pattern to place it in the correct state. Then, either a light or a thermally induced voltage alteration signal was rastered over the surface of the microprocessor while biasing it with the constant current, and fluctuations in the voltage of the constant current power supply were monitored. This technique was adequate for older generation microprocessors because their operating frequencies and power requirements were sufficiently low so as to not impact the power supply. However, as microprocessor operating frequencies and power requirements have increased, the output bias voltage from the power supplies has been degraded. More particularly, the microprocessors create large power fluctuations at the power supply because they switch states so quickly and draw such large amounts of current when switching states that the power supply is unable to react quickly enough to compensate for the sudden change in power requirements. This creates a xe2x80x9cvoltage droopxe2x80x9d in the bias voltage. If the xe2x80x9cvoltage droopxe2x80x9d falls outside the microprocessor""s bias design specifications, the microprocessor will be unable to achieve the proper initialization state.
One technique for mitigating the xe2x80x9cvoltage droopxe2x80x9d has been to add a capacitance as close as possible to the microprocessor power supply pins. The capacitance provides additional power to the microprocessor when it is switching so quickly that the power supply is unable to instantaneously adjust to the increased power demand. A drawback to this approach is that the capacitance filters out the slight voltage perturbations that the test engineer is trying to measure, while the large voltage perturbations take longer to become noticeable.
Accordingly, what is needed is an apparatus and method for testing semiconductor components that allows initializing semiconductor components in a capacitively coupled configuration and measuring small power supply perturbations in a capacitively decoupled configuration.
The present invention satisfies the foregoing need by providing a fixture capable of coupling a range of capacitance values to a semiconductor component and a method for analyzing or testing the semiconductor component using the fixture. In accordance with one embodiment, the fixture comprises a loadboard on which a switched capacitor network is coupled to a semiconductor component receiving area. The switched capacitor network is coupled to the input connector and to a supply terminal suitable for receiving an unbuffered signal.
In accordance with another aspect of the present invention, a method for analyzing the semiconductor component using the loadboard is provided. The method comprises coupling a capacitor to the semiconductor component, then transmitting an initialization pattern to the semiconductor component. After the initialization pattern has been loaded into the semiconductor component, the capacitor is decoupled from the semiconductor component. In one embodiment, a constant current is applied to the semiconductor component and a voltage alteration signal such as, for example, a laser signal, is applied to a portion of the semiconductor component. While the laser signal is being applied, power supply voltage changes or fluctuations are monitored and, preferably, recorded. In addition to recording the magnitude of the voltage change, the location at which the voltage alteration signal is applied to the semiconductor component is recorded. In this embodiment, the voltage alteration signal is applied to another portion of the semiconductor component and the magnitude of the voltage change and the location of the measurement are recorded. This process is continued until the voltage alterations for the entire semiconductor component have been mapped.